1. Field of the Invention
The present invention relates to an apparatus for and to a method of temperature-conditioning a wafer in the process of manufacturing a semiconductor device. More particularly, the present invention relates to an apparatus for and to a method of controlling the distribution of surface temperatures of the wafer.
2. Description of the Related Art
The manufacturing process of a semiconductor device includes heat-treating a wafer, or various films such as photoresist films, conductive films, and dielectric films formed on the wafer, at a predetermined temperature so that the structure thereof is stabilized. In particular. Such heat-treating is carried out during photolithography. In photolithography, a photoresist on the wafer is patterned after a predetermined pattern of a reticle, by coating the wafer with photoresist, exposing the coating of photoresist through the reticle, and developing the photoresist to remove the exposed or unexposed portion thereof. For example, when manufacturing a very large scale integrated (VLS!) semiconductor device having a critical dimension (CD) less than 0.3 xcexcm, after the wafer is coated with a chemically amplified photoresist, a heat treatment is carried out in which the wafer is baked at a temperature within the range of 80xcx9c300xc2x0 C. so that a solvent used to apply the photoresist is evaporated and the photoresist remains on the wafer in the form of a film having a stable structure. Then, a heat treatment referred to as a post exposure bake (referred to as xe2x80x9cPEBxe2x80x9d hereinafter) is performed, thereby forming H+ in a continuous reaction. In PEB, an acid catalyst is formed by the decomposition of a photoacid generator (PAG). In addition, after the development process, a heat treatment known as a hard bake is performed to dry the wafer and harden the photoresist. In addition to these heat treatments, a heat treatment for heating the wafer to a temperature higher than the melting point of the photoresist may, if necessary, be performed. This heat treatment causes a proper amount of the photoresist on the wafer to flow on the wafer after the development process, so that a desired critical dimension can be realized.
An example of a heat-treatment apparatus for heat-treating a wafer as described above is schematically shown in FIG. 1. This heat treatment apparatus, namely a bake unit, comprises a housing 1, a heat transfer plate 2 disposed in the housing 1, and a heater 3 located within the heat transfer plate 2. When a wafer 9 is to be heat-treated by the bake unit, the wafer 9 is inserted in the housing 1 and is laid on the heat transfer plate 2, and is heated by heat transferred from the heater 3 via the heat transfer plate 2. Horizontal movement of the wafer 9 on the heat transfer plate 2 is limited by a guide means (not shown).
The surface of the heat transfer plate 2 has a characteristic temperature distribution meaning that different temperatures are produced across the surface thereof when the heater 3 is operated. These varying temperatures occur due to minute differences in dimensions of the heat transfer plate 2, structural differences thereof and the configuration and location of the heater 3 within the heat transfer plate. Therefore, the wafer 9 to be heat-treated is subject to the temperature distribution at the surface of the heat transfer plate 2 on which the wafer 9 is laid, whereby the temperatures at different portions of the wafer 9 vary. In addition, the temperatures within the housing 1 are influenced by the direction and velocity of the air flow around the bake unit. Therefore the distribution of surface temperatures of the wafer 9 heat-treated by the bake unit may fluctuate from the desired surface temperature distribution.
If a PEB is performed on the wafer 9 using the bake unit after exposing a chemically amplified photoresist on the wafer 9 to the same energy level over an entire exposure portion of the wafer, the chemical reaction proceeds at different rates at respective portions of the exposed photoresist on the wafer 9 due to the variations in the surface temperature of the wafer 9. Therefore, different quantities of the solubilized polymer are removed during developing, resulting in irregularities in the critical dimensions. That is, because an active reaction proceeds during PEB in a portion of the photoresist located directly over a region of the wafer 9 having a high surface temperature, a large quantity of the solubilized polymer is produced and the critical dimension of that portion widens during development. On the other hand, because the reaction proceeds relatively slowly in that portion of the photoresist extending over a region of the wafer 9 having a relatively low surface temperature, the critical dimension of that portion narrows during development. Taking this into consideration, differences in temperature within the bake unit are compensated for by regulating the energy levels, at which the respective portions of the photoresist are exposed, to correspond to the temperature distribution characteristic of the bake unit. For instance, the portions of the photoresist extending over the regions of the wafer 9 having a high surface temperature within the bake unit are subjected to a relatively low energy level during the exposure process, whereas the portions of the photoresist extending over the regions of the wafer 9 having a lower surface temperature are subjected to a higher energy level. Consequently, less acid, which will serve as a catalyst during the PEB, is produced in the portion of the photoresist exposed to the lower energy level than in the portion exposed to the higher energy level. Thus, relatively uniform critical dimensions can be acquired by the wafer 9.
However, such uniform critical dimensions degrade when the wafer exposed to energy adjusted in consideration of the temperature distribution characteristic of any one bake unit is heat-treated in another bake unit. Therefore, the wafers which are to be heat-treated more than once must be heat-treated sequentially in the same bake unit.
However, as is well known, the PEB process requires a long time whereas the applying, developing, and exposing of the photoresist can be performed in a relatively short time. That is, the PEB process requires the longest time of all the processes involved in photolithography and therefore, the PEB process is considered to pose a limit on the overall productivity associated with photolithography. The problem, per se, of the low productivity of photolithography as caused by the PEB process could be easily resolved by, for example, heat-treating the exposed wafers using a plurality of bake units disposed in parallel. However, if the exposed wafers are not subjected to PEB in the same bake unit used during the exposure process, the above-described problem of non-uniformity in their critical dimensions arises. Accordingly, the delay caused by the PEB process cannot be overcome without giving rise to other significant problems. Thus, the productivity associated with photolithography remains low.
It is therefore an object of the present invention to provide a method of and an apparatus for heat-treating a wafer such that the distribution of surface temperatures of the wafer when heat-treated corresponds to a desired distribution of surface temperatures determined in advance of the heat-treatment.
To achieve this object, the heat-treating apparatus of the present invention includes a heat transfer plate, a heater, and a plurality of spacers projecting from the upper surface of the heat transfer plate such that a wafer to be heat-treated can be supported by the spacers while facing and being spaced from the heat transfer plate. The spacing between the wafer supported by the spacers and the heat transfer plate and the inclination of the wafer relative to the upper surface of the heat transfer plate can be adjusted by the spacers to produce the desired distribution of surface temperatures.
To achieve the object, the method of heat-treating a wafer according to the present invention comprises the steps of setting a wafer in a position above a heat transfer plate, heat-treating the wafer by transferring heat between the heat transfer plate and the wafer disposed thereabove. To set the wafer in position for heat-treatment, the wafer are spaced by and inclined relative to the upper surface of the heat transfer plate by amounts which have been predetermined to produce a desired a distribution of surface temperatures across the wafer when the wafer is heat-treated.